Frank K. Gürkaynak



    Director of Microelectronics Design Center (DZ)
    The Microelectronics Design Center provides design tools, know-how and licenses for ASIC, FPGA, Embedded Systems and PCB design supporting research and teaching at the Department of Information Technology and Electrical Engineering (D-ITET) of ETH Zurich.

    Senior Scientist working with Prof. Luca Benini in the Digital Circuits and Systems Group of Integrated Systems Laboratory (IIS)
    We focus on energy efficient implementation of digital circuits and systems over a very wide operating range from IoT applications to HPC systems.

    Contact

    e-mail: <kgf@iis.ee.ethz.ch> (kgf@ethz.ch and kgf@ee.ethz.ch will also work. For MS teams invites use kgf@ethz.ch)
    www: http://www.iis.ee.ethz.ch/~kgf <ETH Zurich> <Google Scholar> <LinkedIn> <ORCID>
    address: 

    ETZ J 60.1,
Gloriastrasse 35,
CH-8092 Zurich,
Switzerland

    About Me

    Born in Istanbul, I obtained my BSc. and M.Sc. degrees from Electrical and Electronical Engineering Department of the Istanbul Technical University and my Ph.D. from the Integrated Systems Laboratory (IIS) of ETH Zurich.

    I have been involved in teaching and research at Istanbul Technical University in Turkey, Worcester Polytechnic Institute in U.S.A, EPFL and ETH Zürich in Switzerland.

      Current Lectures:
        [Design of Digital Circuits and Computer Architecture] [VLSI 1] [VLSI 2] [VLSI 4] (Accesible only within ETH Zurich domain)
      Recent Previous Lectures:
        P&S offerings of D-ITET: [Essential Skills for your Engineering Career] (Accesible only within ETH Zurich domain)

    I have supported (at least partially) the following projects technically and administratively.

      Active Projects :
        EU: [EU pilot] [EPI - European Processor Initiative]
        [Convolve] [NeuroSoC] [Corenext] [dAIEDGE] [TAICHIP] [Tristan] [Isolde] SNSF: [PEDESITE] [Tiny Trainer]

      Completed Projects:
        EU: [Ampere] [Fractal] [Aloha] [Mnemosene] [Oprecomp] [Eurolab4HPC2] [Hercules] [Antarex] [Eurolab4HPC] [P-Socrates] [Galaxy]
        SNSF: [HCSCA] [Microlearn] [Transient Computing] [Biodev] [IcySoC] [Ultrasound] [YINS] [CMOSAIC] [Qcrypt]
        ETH Zurich: [Memristor]

    I still actively contribute to research in the following fields:

    • Ultra-low-power processor design:
      I am involved in the Parallel Ultra-Low Power (PULP) project.
    • Design and test of digital integrated circuits and system design
      Throughout my time at ETH Zürich, I was involved with the test of integrated circuits designed at the Integrated Systems Laboratory, first as an assistant and later as a lecturer for the VLSI 4 course. Together with my group at the Microelectronics Design Center we review all integrated circuit projects and discuss testing strategies.
    • Cryptographic Hardware
      I have been involved in evaluating the performance of cryptographic hardware for the past 20 years. Together with semester and master students at ETH Zürich we have implemented a large number of candidate algorithms of AES, SHA-3, e-stream and Ceaser cryptographic algorithm competitions, and have collabrated on many projects that investigates all aspects of side channel security. Recent interests include cryptographic accelerators that are connected to our PULP systems.
    • Open Source Hardware
      Our PULP project is one of the more visible open source hardware projects, and I spend some of my time advocating the use of open source hardware in both academia and industry.

    Links

    • Visit the IIS-Chip gallery that contains most of the integrated circuits designed at IIS. See also my contributor page at the chip gallery
    • Further www pages I have setup and or presently maintain:
        Public: [DZ Homepage] [iis-projects] [Antalya- an experimental wiki]
        Within ETH Zurich domain only: [EDA wiki] [iis-students] [iis-internal]
    • the SHA-3 evaluation page
    • I like carrying around a camera when I travel, here are some pictures I made:-), not nearly as up to date as I would like.